1. Field of the Invention
The present invention relates generally to automatic test equipment (ATE) and, more particularly, to measurement errors in ATEs.
2. Description of the Related Art
Exemplary automatic test equipments (ATEs) are typically configured to quickly test the responses of a large number of electronic modules which are conventionally referred to as devices under test (DUTs). In general, each DUT has been designed to receive input stimulation signals Sin at a first set of DUT terminals and, in response, generate output signals Sout at a second set of terminals. Accordingly, an exemplary ATE generates the input signals, applies them to the first terminal set of each DUT and receives and analyzes the output signals Sout from the second terminal set of each DUT to determine which DUTs meet their specified performance. Because this performance must generally be met while supplying or sinking a specified current, the exemplary ATE also applies a specified current load to the DUT.
ATEs typically include a large number of test interface modules that are each coupled to a terminal of a respective one of the DUTs. Each test interface module generally incudes circuits that a) generate input driving signals for its respective DUT, b) compare the DUT""s output signals to reference signals and c) apply specified current loads to the DUT. Because these test interface circuits realize driving, comparing and loading functions, they are typically called DCL modules (D, C and L respectively referring to the driving, comparing and loading functions). In addition, the driver circuits are often referred to as xe2x80x9cpin driversxe2x80x9d because they apply input signals to DUT terminals or pins.
The output signals Sout are carried along transmission channels or paths from the DUTs to the ATE comparators that characterize or analyze them by comparing them to reference signals Sref. Unfortunately, all transmission paths have transmission parameters (e.g., skin effect and dielectric absorption) that induce signal distortion so that output signals Sout enter the transmission paths but distorted output signals Sdstrd-out exit the paths. The reference signals Sref are therefore compared to distorted output signals Sdstrd-out rather than to the original output signals Sout. Therefore, the ATEs performance measurement is in error because it is incorrectly based upon the distorted output signals Sdstrd-out.
For example, FIG. 1 shows a DUT 20 and a plurality of test interface modules 22A, 22B-22N that are each coupled to a respective one of of the DUT""s terminals 24. The test interface module 22A is detailed to show that it includes a driver in the form of a waveform synthesizer 26, a comparator 28 and an active load 30. In response to control signals Scntrl 32, the synthesizer and the active load can apply specified input driving signals and current loads to the terminal 32 of the DUT 20. The other test interface modules can provide similar measurement functions to their respective DUT terminals.
The DUT 20 generates an output signal Sout at the terminal 34 and it is carried over a transmission path 36 to the comparator 28 which compares this signal to a reference signal Sref and delivers a resultant output at an output port Pout. Although the transmission path 36 is indicated as a coaxial cable, it can take on other transmission path forms, (e.g., wires, striplines and microstrips). Regardless of its exact form, the transmission path 34 will impose a signal distortion upon the output signal Sout. A distorted signal is thus presented to the comparator 28 and, accordingly, its output at the output port Pout characterizes this distorted signal rather than the output signal Sout.
FIG. 2A shows an exemplary output signal Sout 40 that is provided to the comparator 28 over a transmission path 36 that imposes a signal distortion so that a distorted output signal Sdst-out 42 is received by the comparator 28. With the aid of a level-shifted reference signal Sref, the comparator 28 can detect amplitudes of the distorted output signal at respective test times Ttst throughout the signal""s duration.
For example, at an exemplary test time 44 of FIG. 2A, a latch signal can be applied to the comparator 28 to thereby latch its output at the output port Pout. By observing the latched output for each of a plurality of level-shifted reference signals Sref, a reference signal level 46 can be found wherein above this signal level, the comparator""s output has one polarity and below it, the comparator""s output has an opposite polarity. Thus, the distorted output signal 42 has an amplitude substantially equal to the reference signal level 46 at the exemplary test time 44. This process can be automated with various conventional circuits. An integrator 48, for example, will automatically servo the reference signal to the final reference value 46.
FIG. 2B repeats the distorted output signal 42 and shows a table 50 of corresponding time and voltage pairs wherein each voltage Vtst is the amplitude of the distorted output signal at a test time that is determined by a respective latch delay Dlatch. In this exemplary process (sometimes referred to as xe2x80x9cdigitizingxe2x80x9d or, in ATE vernacular, xe2x80x9cschmooingxe2x80x9d), the comparator 28 of FIGS. 1 and 2A can determine time and voltage pairs that define the shape and timing of a signal at its input. Because this signal is, however, the distorted output signal 42 of FIG. 2A, the table 50 of FIG. 2B includes measurement errors generated by the signal distortion of the transmission path 36.
Numerous efforts (e.g., see U.S. Pat. No. 5,216,373, 5,532,590, 5,940,441, 5,955,890 and 6,016,566) have been directed to the correction and/or compensation of ATE measurement errors that originate because of transmission-path signal distortion. Although these efforts may reduce the distortion-induced errors, they are generally complex solutions that would impose unacceptable cost increases in ATEs that are configured to simultaneously test large numbers (e.g., hundreds) of DUTs.
The present invention is directed to comparator methods and structures whose accuracy in analyzing an output signal Sout of a DUT is enhanced because they compensate for a signal distortion that is imposed by a transmission path over which the output signal Sout is received.
These goals are realized with an analysis method that comprises the process steps of:
a) providing a reference signal Sref,
b) combining the reference signal Sref with a reference distortion that corresponds to the signal distortion to thereby realize a compensated reference signal Scmp-ref, and
c) comparing the output signal Sout to the compensated reference signal Scmp-ref to determine signal parameters of the output signal Sout.
In a method embodiment, the providing step includes the step of configuring the reference signal Sref as a constant reference voltage Vref that can be level-shifted and the combining step includes the step of configuring a first time portion of the compensated reference signal Scmp-ref to substantially equal the reference voltage Vref and a second time portion of the compensated reference signal Scmp-ref to substantially track the signal distortion.
In another method embodiment, the comparing step includes the step of level-shifting the reference signal Sref, at each of test times Ttst, to determine a reference signal level Lref for which the compensated reference signal Scmp-ref substantially equals the output signal Sout at that test time Ttst.
The methods of the invention facilitate the use of simple comparator structures that do not significantly increase the cost of ATEs but which do significantly increase accuracy of signal analysis.
The novel features of the invention are set forth with particularity in the appended claims. The invention will be best understood from the following description when read in conjunction with the accompanying drawings.